Intel VLSI written 2015
3:56:00 PM
Written Test
Pattern
Aptitude -25 questions
Fairly easy. But time was limited i guess.
Electronics - 25 questions
Very easy. Total time for 50 questions was 60 min.
Subjective : 2 questions, and you can select 1 out of it. [ 1 analog and 1 digital ]
1. All dimensions of a capacitor was scaled down by k. If the previous values of capacitance was C and quality factor Q, find the modified values.
2. Short circuit emitter gain of bjt circuit
3. Given Ev=0.57eV. (KT/q = 0.02eV). Find the fermilevel if Nv is 25 times of Nc.
4. A direct question based on diffusion capacitance was given. T (taw) , I , Vt were given. Find diffusion capacitance.
5. R1=10k,R2=2k,R=10k,C=10pf. Find the frequency.
6. For an 8085
MOVI A,#06H
MOV B,A
RLC A
ADD B,A
RLC A
ADD B,A
Find the value of A and CY.
7. ni = 2x10^10 cm^-3 . p = 3x10^16 cm^-3 . Find 'n'.
8. If the oscillator of 8051 is 11.0592Mhz, what is the maximum frequency of square wave that can be measured in it.
9. T1(s) = (s+1)/s(s+2). T2(s) = s+2 .
What is the transfer function of the system formed by cascading T1 and T2.
10. Given a rod as shown. Electric field applied is also given. Find the current.
11. What is the #inverters required for realizing the complementary of the function (x+~y)(xy+x~z)
12. In 8085, IO/~M = 0, S0 and S1 = 1,if ~RD = 0, what is the operation being performed
(A) opcode fetch
(B) memory read
(C) memory write
(D) none of these
Given F=ABC+BC~D+~ABC
(A) make the truth table
(B) minimize the logic expression
(C) find the minimum # NAND gates required to implement it
Interview
Depends on your luck :)
I was shown a circuit and asked to design the same in verilog.
Also, was asked some questions related computer architecture. Some guys were asked basic digital questions. And some others interview was strictly based on their project.
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