Nvidia VLSI written 2015

3:59:00 PM



Written Test 
Pattern
3 aptitude questions and 8 digital questions

Digital Questions

1. Two lines are carrying 500Hz and 2kHz. You are given flipflops, comparators, leds and combinational gates. Design a circuit to find which line carries which frequency.

2. Design an optimal circuit for 1,3,5,7,1,....
3.  Given the following flipflop connection.
                                                     

Tclk_q = 6ns

(A) Find the maximum hold time
(B) What does the circuit represent
(C) What is the maximum frequency

4. We have an L1 cache with 60% hit ratio and 10ns latency.  Main memory latency = 100ns.
(A) what is the memory access time?
(B) if an L2 cache of hit ratio 40% is added, what is the memory access time?
(C) what is the new hit ratio for ( L1 + L2 ) system?

5. You are given a 2^n * M RAM.

You are suppposed to list out all the 8 instructions that can test the working of the RAM.

6. Given the figure

(A) Will there be underflow/overflow if the data is coming at every clock cycle?
(B) If the data is coming in 100 cycles (80 data ) what should be the fifo size?


7. A true/ false question

8. Design a combinatorial block to detect whether the given 16 bit number is an nth power of 2.

Interview 

Fairly easy and stick to basics. 







You Might Also Like

0 comments

PHYSICAL DESIGN

Featured post

Most Important Topics for VLSI Interviews

In this post, i just want to talk about the most preferred topic by the interviewers in the recent past. I have also given the best resourc...